Tomi Junnila
Almanpolku 2
21500 Piikkiö
Finland
Tel. +358 (0)50 568 9864
Last updated December 13, 2022
Family
Marital Status: Married
Children: 2 children, born 2004 and 2010
Language Skills
| English | Excellent |
|---|
| Finnish | Native |
|---|
| French | Poor |
|---|
| Swedish | Poor |
|---|
Professional Skills
| SoC design | - Several SoC integration projects, including subsystem integration responsibility.
- Trace & Debug architecture, ARM CoreSight
|
|---|
| SoC verification | - SoC co-verification software design (C, C++ and assembly mostly for ARM and TMS320C55x processor cores)
- SoC co-simulation wakeup responsibility
- IP-level test bench development for reuse in ASIC-level verification
- Production test vector creation and validation
|
|---|
| Software design | - Object-Oriented Design
- Web application design (ASP.NET MVC & Core, , PHP)
- Windows application design (WPF)
- Low level driver design
- Qt C++ framework
- Some plain Windows API experience
- Database administration
|
|---|
| Programming languages | | Assembly | ARM: extensive, TMS320C55x: some, x86: some |
|---|
| bash | good |
|---|
| C | extensive |
|---|
| C++ | extensive |
|---|
| C# | extensive |
|---|
| Java | some |
|---|
| perl | some |
|---|
| PHP | several years |
|---|
| Python | some |
|---|
| Ruby | limited |
|---|
| SystemVerilog | extensive |
|---|
| tcsh | some |
|---|
| VHDL | extensive |
|---|
| XSLT | some |
|---|
|
|---|
| Software frameworks | | Angular 1 | some |
|---|
| ASP.NET Core | good |
|---|
| ASP.NET MVC 1-4 | good |
|---|
| ASP.NET Web API | good |
|---|
| React | limited |
|---|
|
|---|
Work History
| 2008–present | Owner, Other Alien Software- Developing accounting and on-board ship stability software in C# on the Windows platform
|
|---|
| 2015–present | Senior R&D Engineer, Nordic Semiconductor- SoC verification
- Subsystem verification
- Subsystem design & integration
- IP design
|
|---|
| 2013–2015 | Software Engineer, Information Management, Cadmatic oy- Full stack software engineering
- CADMATIC eShare digital twin platform
|
|---|
| 2007–2012 | Staff Engineer, SoC verification, STMicroelectronics / ST-NXP Wireless / ST-Ericsson- SoC verification
- Verification platform architecture and design in ARM assembly language, C and C++
- Verification planning
- Software implementation
- SoC wake-up
- SoC architecture design
- Participated in Trace & Debug architecture design
- IP architecture design
- Trace & Debug IPs:
- MIPI System Trace Protocol v2
- Trace Memory Manager for USB
- MIPI SneakPeek Protocol
- Industry standardisation
- Company representative in the MIPI Debug Workgroup and USB Debug Framework
- Author of the MIPI System Trace Protocol v2, MIPI Debug Adaptor for USB, and MIPI Debug Adaptor for UniPro
|
|---|
| 1998–2007 | Digital ASIC design specialist, Nokia Technology Platform- SoC verification:
- SoC co-simulation wakeup responsibility
- Mostly in C and ARM1176JZF-S and TMS320C55x assembly languages
- SoC subsystem integration
- Production test vector creation and validation
- IP design:
- 3GPP searcher module
- System trace interface (including standardisation work into MIPI STP)
- Module-level test bench development for reuse in SoC-level verification
- Industry standardisation:
- Participating in the MIPI Debug Workgroup (then Trace & Debug Workgroup)
- Author of the MIPI System Trace Protocol v1
- Patent
- "A method for time-stamping messages", awarded 2008, with Ossi Lindvall (in use in the MIPI System Trace Protocol)
|
|---|
| 1997–1998 | Software Designer, Ship Consulting Ltd Oy- Developed on-board ship stability software used on approximately 30 vessels worldwide
|
|---|
| 1996–1998 | Linux System Administrator, Nisamest oy- Maintained the company's public web server
|
|---|
| 1992–1996 | Software Designer, TOP-Case ky- Developed accounting and personal finance software in C, C++, Delphi, and x86 assembly language
- Technical support for Proxim wireless local area networks)
|
|---|
Education
| 1993–2001 | University of Turku, Master of Science in Electronics and Information Technology Minor subjects: Physics, Mathematics and Computer Science Master Thesis titled "Designing a Rake Receiver for the Common Pilot Channels in 3GPP" (2000), eximia cum laude approbatur. |
|---|
| 1990–1993 | Tuurepori secondary school, Turku, Finland. Baccalaureate spring of 1993, laudatur. |
|---|
Military Service
1994–1995: signal corps, current rank senior lieutenant (reserve).
Responsible Positions