Curriculum Vitae — Tomi Junnila

Tomi Junnila
Kaarina, Finland

Last updated September 28, 2026

Professional Skills

Several SoC integration projects, including subsystem integration responsibility.
Trace & Debug architecture, ARM CoreSight

SoC co-verification software design (C, C++ and assembly mostly for ARM and TMS320C55x processor cores)
SoC co-simulation wakeup responsibility
IP-level test bench development for reuse in ASIC-level verification
Production test vector creation and validation

Developing accounting and on-board ship stability software in C# on the ASP.NET Core platform

SoC verification
- Verification platform architecture and design in ARM assembly language, C and C++
- Verification planning
- Software implementation
- SoC wake-up
SoC architecture design
- Participated in Trace & Debug architecture design
IP architecture design
- Trace & Debug IPs:
  - MIPI System Trace Protocol v2
  - Trace Memory Manager for USB
  - MIPI SneakPeek Protocol
Industry standardisation
- Company representative in the MIPI Debug Workgroup and USB Debug Framework
- Author of the MIPI System Trace Protocol v2, MIPI Debug Adaptor for USB, and MIPI Debug Adaptor for UniPro

SoC verification:
- SoC co-simulation wakeup responsibility
- Mostly in C and ARM1176JZF-S and TMS320C55x assembly languages
SoC subsystem integration
Production test vector creation and validation
IP design:
- 3GPP searcher module
- System trace interface (including standardisation work into MIPI STP)
- Module-level test bench development for reuse in SoC-level verification
Industry standardisation:
- Participating in the MIPI Debug Workgroup (then Trace & Debug Workgroup)
- Author of the MIPI System Trace Protocol v1
Patent
- "A method for time-stamping messages", awarded 2008, with Ossi Lindvall (in use in the MIPI System Trace Protocol)

Developed on-board ship stability software used on approximately 30 vessels worldwide

Developed accounting and personal finance software in C, C++, Delphi, and x86 assembly language
Technical support for Proxim wireless local area networks

University of Turku, Master of Science in Electronics and Information Technology

Minor subjects: Physics, Mathematics and Computer Science

Master Thesis titled "Designing a Rake Receiver for the Common Pilot Channels in 3GPP" (2000), eximia cum laude approbatur.

Tuurepori secondary school, Turku, Finland. Baccalaureate spring of 1993, laudatur.

1994–1995, current rank captain (reserve).

2014–2017: BDSM-yhdistys Turun Baletti ry, treasurer
2004–2007: Turku Science Fiction Society, treasurer (2004–2006), board member (2004–2007)
1997–2008: Science Fiction Culture Cabinet at the University of Turku, treasurer (1997–2008), secretary (2006)
2001–2003: Finncon X - Eurocon 2003, member of the organizing committee
1998–2000: Turku Medieval Society, chairperson
1997–1999: Finncon 1999, secretary of the organizing committee
1998: Turun yliopiston rooli- ja strategiapeliseura Tyrmä, treasurer

Marital Status: Married

Children: 2 children, born 2004 and 2010